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  <section id="module-skidl.circuit">
<span id="skidl-circuit-module"></span><h1>skidl.circuit module<a class="headerlink" href="#module-skidl.circuit" title="Link to this heading">¶</a></h1>
<p>Handles complete circuits made of parts and nets.</p>
<dl class="py class">
<dt class="sig sig-object py" id="skidl.circuit.Circuit">
<em class="property"><span class="pre">class</span><span class="w"> </span></em><span class="sig-prename descclassname"><span class="pre">skidl.circuit.</span></span><span class="sig-name descname"><span class="pre">Circuit</span></span><span class="sig-paren">(</span><em class="sig-param"><span class="o"><span class="pre">**</span></span><span class="n"><span class="pre">kwargs</span></span></em><span class="sig-paren">)</span><a class="reference internal" href="../_modules/skidl/circuit.html#Circuit"><span class="viewcode-link"><span class="pre">[source]</span></span></a><a class="headerlink" href="#skidl.circuit.Circuit" title="Link to this definition">¶</a></dt>
<dd><p>Bases: <a class="reference internal" href="skidl.skidlbaseobj.html#skidl.skidlbaseobj.SkidlBaseObject" title="skidl.skidlbaseobj.SkidlBaseObject"><code class="xref py py-class docutils literal notranslate"><span class="pre">SkidlBaseObject</span></code></a></p>
<p>Class object that holds the entire netlist of parts and nets.</p>
<dl class="py attribute">
<dt class="sig sig-object py" id="skidl.circuit.Circuit.parts">
<span class="sig-name descname"><span class="pre">parts</span></span><a class="headerlink" href="#skidl.circuit.Circuit.parts" title="Link to this definition">¶</a></dt>
<dd><p>List of all the schematic parts as Part objects.</p>
</dd></dl>

<dl class="py attribute">
<dt class="sig sig-object py" id="skidl.circuit.Circuit.nets">
<span class="sig-name descname"><span class="pre">nets</span></span><a class="headerlink" href="#skidl.circuit.Circuit.nets" title="Link to this definition">¶</a></dt>
<dd><p>List of all the schematic nets as Net objects.</p>
</dd></dl>

<dl class="py attribute">
<dt class="sig sig-object py" id="skidl.circuit.Circuit.buses">
<span class="sig-name descname"><span class="pre">buses</span></span><a class="headerlink" href="#skidl.circuit.Circuit.buses" title="Link to this definition">¶</a></dt>
<dd><p>List of all the buses as Bus objects.</p>
</dd></dl>

<dl class="py attribute">
<dt class="sig sig-object py" id="skidl.circuit.Circuit.hierarchy">
<span class="sig-name descname"><span class="pre">hierarchy</span></span><a class="headerlink" href="#skidl.circuit.Circuit.hierarchy" title="Link to this definition">¶</a></dt>
<dd><p>A ‘.’-separated concatenation of the names of nested
SubCircuits at the current time it is read.</p>
</dd></dl>

<dl class="py attribute">
<dt class="sig sig-object py" id="skidl.circuit.Circuit.level">
<span class="sig-name descname"><span class="pre">level</span></span><a class="headerlink" href="#skidl.circuit.Circuit.level" title="Link to this definition">¶</a></dt>
<dd><p>The current level in the schematic hierarchy.</p>
</dd></dl>

<dl class="py attribute">
<dt class="sig sig-object py" id="skidl.circuit.Circuit.context">
<span class="sig-name descname"><span class="pre">context</span></span><a class="headerlink" href="#skidl.circuit.Circuit.context" title="Link to this definition">¶</a></dt>
<dd><p>Stack of contexts for each level in the hierarchy.</p>
</dd></dl>

<dl class="py method">
<dt class="sig sig-object py" id="skidl.circuit.Circuit.ERC">
<span class="sig-name descname"><span class="pre">ERC</span></span><span class="sig-paren">(</span><em class="sig-param"><span class="o"><span class="pre">*</span></span><span class="n"><span class="pre">args</span></span></em>, <em class="sig-param"><span class="o"><span class="pre">**</span></span><span class="n"><span class="pre">kwargs</span></span></em><span class="sig-paren">)</span><a class="reference internal" href="../_modules/skidl/circuit.html#Circuit.ERC"><span class="viewcode-link"><span class="pre">[source]</span></span></a><a class="headerlink" href="#skidl.circuit.Circuit.ERC" title="Link to this definition">¶</a></dt>
<dd><p>Run class-wide and local ERC functions on this circuit.</p>
</dd></dl>

<dl class="py method">
<dt class="sig sig-object py" id="skidl.circuit.Circuit.activate">
<span class="sig-name descname"><span class="pre">activate</span></span><span class="sig-paren">(</span><em class="sig-param"><span class="n"><span class="pre">name</span></span></em>, <em class="sig-param"><span class="n"><span class="pre">tag</span></span></em><span class="sig-paren">)</span><a class="reference internal" href="../_modules/skidl/circuit.html#Circuit.activate"><span class="viewcode-link"><span class="pre">[source]</span></span></a><a class="headerlink" href="#skidl.circuit.Circuit.activate" title="Link to this definition">¶</a></dt>
<dd><p>Save the previous hierarchical group and activate a new one.</p>
</dd></dl>

<dl class="py method">
<dt class="sig sig-object py" id="skidl.circuit.Circuit.add_buses">
<span class="sig-name descname"><span class="pre">add_buses</span></span><span class="sig-paren">(</span><em class="sig-param"><span class="o"><span class="pre">*</span></span><span class="n"><span class="pre">buses</span></span></em><span class="sig-paren">)</span><a class="reference internal" href="../_modules/skidl/circuit.html#Circuit.add_buses"><span class="viewcode-link"><span class="pre">[source]</span></span></a><a class="headerlink" href="#skidl.circuit.Circuit.add_buses" title="Link to this definition">¶</a></dt>
<dd><p>Add some Bus objects to the circuit. Assign a bus name if necessary.</p>
</dd></dl>

<dl class="py method">
<dt class="sig sig-object py" id="skidl.circuit.Circuit.add_hierarchical_name">
<span class="sig-name descname"><span class="pre">add_hierarchical_name</span></span><span class="sig-paren">(</span><em class="sig-param"><span class="n"><span class="pre">name</span></span></em><span class="sig-paren">)</span><a class="reference internal" href="../_modules/skidl/circuit.html#Circuit.add_hierarchical_name"><span class="viewcode-link"><span class="pre">[source]</span></span></a><a class="headerlink" href="#skidl.circuit.Circuit.add_hierarchical_name" title="Link to this definition">¶</a></dt>
<dd><p>Record a new hierarchical name.  Throw an error if it is a duplicate.</p>
</dd></dl>

<dl class="py method">
<dt class="sig sig-object py" id="skidl.circuit.Circuit.add_nets">
<span class="sig-name descname"><span class="pre">add_nets</span></span><span class="sig-paren">(</span><em class="sig-param"><span class="o"><span class="pre">*</span></span><span class="n"><span class="pre">nets</span></span></em><span class="sig-paren">)</span><a class="reference internal" href="../_modules/skidl/circuit.html#Circuit.add_nets"><span class="viewcode-link"><span class="pre">[source]</span></span></a><a class="headerlink" href="#skidl.circuit.Circuit.add_nets" title="Link to this definition">¶</a></dt>
<dd><p>Add some Net objects to the circuit. Assign a net name if necessary.</p>
</dd></dl>

<dl class="py method">
<dt class="sig sig-object py" id="skidl.circuit.Circuit.add_packages">
<span class="sig-name descname"><span class="pre">add_packages</span></span><span class="sig-paren">(</span><em class="sig-param"><span class="o"><span class="pre">*</span></span><span class="n"><span class="pre">packages</span></span></em><span class="sig-paren">)</span><a class="reference internal" href="../_modules/skidl/circuit.html#Circuit.add_packages"><span class="viewcode-link"><span class="pre">[source]</span></span></a><a class="headerlink" href="#skidl.circuit.Circuit.add_packages" title="Link to this definition">¶</a></dt>
<dd></dd></dl>

<dl class="py method">
<dt class="sig sig-object py" id="skidl.circuit.Circuit.add_parts">
<span class="sig-name descname"><span class="pre">add_parts</span></span><span class="sig-paren">(</span><em class="sig-param"><span class="o"><span class="pre">*</span></span><span class="n"><span class="pre">parts</span></span></em><span class="sig-paren">)</span><a class="reference internal" href="../_modules/skidl/circuit.html#Circuit.add_parts"><span class="viewcode-link"><span class="pre">[source]</span></span></a><a class="headerlink" href="#skidl.circuit.Circuit.add_parts" title="Link to this definition">¶</a></dt>
<dd><p>Add some Part objects to the circuit.</p>
</dd></dl>

<dl class="py method">
<dt class="sig sig-object py" id="skidl.circuit.Circuit.add_stuff">
<span class="sig-name descname"><span class="pre">add_stuff</span></span><span class="sig-paren">(</span><em class="sig-param"><span class="o"><span class="pre">*</span></span><span class="n"><span class="pre">stuff</span></span></em><span class="sig-paren">)</span><a class="reference internal" href="../_modules/skidl/circuit.html#Circuit.add_stuff"><span class="viewcode-link"><span class="pre">[source]</span></span></a><a class="headerlink" href="#skidl.circuit.Circuit.add_stuff" title="Link to this definition">¶</a></dt>
<dd><p>Add Parts, Nets, Buses, and Interfaces to the circuit.</p>
</dd></dl>

<dl class="py method">
<dt class="sig sig-object py" id="skidl.circuit.Circuit.backup_parts">
<span class="sig-name descname"><span class="pre">backup_parts</span></span><span class="sig-paren">(</span><em class="sig-param"><span class="n"><span class="pre">file_</span></span><span class="o"><span class="pre">=</span></span><span class="default_value"><span class="pre">None</span></span></em><span class="sig-paren">)</span><a class="reference internal" href="../_modules/skidl/circuit.html#Circuit.backup_parts"><span class="viewcode-link"><span class="pre">[source]</span></span></a><a class="headerlink" href="#skidl.circuit.Circuit.backup_parts" title="Link to this definition">¶</a></dt>
<dd><p>Saves parts in circuit as a SKiDL library in a file.</p>
<dl class="field-list simple">
<dt class="field-odd">Parameters<span class="colon">:</span></dt>
<dd class="field-odd"><p><strong>file</strong> – Either a file object that can be written to, or a string
containing a file name, or None. If None, a standard library
file will be used.</p>
</dd>
<dt class="field-even">Returns<span class="colon">:</span></dt>
<dd class="field-even"><p>Nothing.</p>
</dd>
</dl>
</dd></dl>

<dl class="py method">
<dt class="sig sig-object py" id="skidl.circuit.Circuit.deactivate">
<span class="sig-name descname"><span class="pre">deactivate</span></span><span class="sig-paren">(</span><span class="sig-paren">)</span><a class="reference internal" href="../_modules/skidl/circuit.html#Circuit.deactivate"><span class="viewcode-link"><span class="pre">[source]</span></span></a><a class="headerlink" href="#skidl.circuit.Circuit.deactivate" title="Link to this definition">¶</a></dt>
<dd><p>Deactivate the current hierarchical group and return to the previous one.</p>
</dd></dl>

<dl class="py attribute">
<dt class="sig sig-object py" id="skidl.circuit.Circuit.erc_list">
<span class="sig-name descname"><span class="pre">erc_list</span></span><em class="property"><span class="w"> </span><span class="p"><span class="pre">=</span></span><span class="w"> </span><span class="pre">[&lt;function</span> <span class="pre">dflt_circuit_erc&gt;]</span></em><a class="headerlink" href="#skidl.circuit.Circuit.erc_list" title="Link to this definition">¶</a></dt>
<dd></dd></dl>

<dl class="py method">
<dt class="sig sig-object py" id="skidl.circuit.Circuit.generate_dot">
<span class="sig-name descname"><span class="pre">generate_dot</span></span><span class="sig-paren">(</span><em class="sig-param"><span class="n"><span class="pre">file_</span></span><span class="o"><span class="pre">=</span></span><span class="default_value"><span class="pre">None</span></span></em>, <em class="sig-param"><span class="n"><span class="pre">engine</span></span><span class="o"><span class="pre">=</span></span><span class="default_value"><span class="pre">'neato'</span></span></em>, <em class="sig-param"><span class="n"><span class="pre">rankdir</span></span><span class="o"><span class="pre">=</span></span><span class="default_value"><span class="pre">'LR'</span></span></em>, <em class="sig-param"><span class="n"><span class="pre">part_shape</span></span><span class="o"><span class="pre">=</span></span><span class="default_value"><span class="pre">'rectangle'</span></span></em>, <em class="sig-param"><span class="n"><span class="pre">net_shape</span></span><span class="o"><span class="pre">=</span></span><span class="default_value"><span class="pre">'point'</span></span></em>, <em class="sig-param"><span class="n"><span class="pre">splines</span></span><span class="o"><span class="pre">=</span></span><span class="default_value"><span class="pre">None</span></span></em>, <em class="sig-param"><span class="n"><span class="pre">show_values</span></span><span class="o"><span class="pre">=</span></span><span class="default_value"><span class="pre">True</span></span></em>, <em class="sig-param"><span class="n"><span class="pre">show_anon</span></span><span class="o"><span class="pre">=</span></span><span class="default_value"><span class="pre">False</span></span></em>, <em class="sig-param"><span class="n"><span class="pre">split_nets</span></span><span class="o"><span class="pre">=</span></span><span class="default_value"><span class="pre">['GND']</span></span></em>, <em class="sig-param"><span class="n"><span class="pre">split_parts_ref</span></span><span class="o"><span class="pre">=</span></span><span class="default_value"><span class="pre">[]</span></span></em><span class="sig-paren">)</span><a class="reference internal" href="../_modules/skidl/circuit.html#Circuit.generate_dot"><span class="viewcode-link"><span class="pre">[source]</span></span></a><a class="headerlink" href="#skidl.circuit.Circuit.generate_dot" title="Link to this definition">¶</a></dt>
<dd><p>Returns a graphviz graph as graphviz object and can also write it to a file/stream.
When used in ipython the graphviz object will drawn as an SVG in the output.</p>
<p>See <a class="reference external" href="https://graphviz.readthedocs.io/en/stable/">https://graphviz.readthedocs.io/en/stable/</a> and <a class="reference external" href="http://graphviz.org/doc/info/attrs.html">http://graphviz.org/doc/info/attrs.html</a></p>
<dl class="field-list simple">
<dt class="field-odd">Parameters<span class="colon">:</span></dt>
<dd class="field-odd"><ul class="simple">
<li><p><strong>file</strong> – A string containing a file name, or None.</p></li>
<li><p><strong>engine</strong> – See graphviz documentation</p></li>
<li><p><strong>rankdir</strong> – See graphviz documentation</p></li>
<li><p><strong>part_shape</strong> – Shape of the part nodes</p></li>
<li><p><strong>net_shape</strong> – Shape of the net nodes</p></li>
<li><p><strong>splines</strong> – Style for the edges, try ‘ortho’ for a schematic like feel</p></li>
<li><p><strong>show_values</strong> – Show values as external labels on part nodes</p></li>
<li><p><strong>show_anon</strong> – Show anonymous net names</p></li>
<li><p><strong>split_nets</strong> – splits up the plot for the given list of net names</p></li>
<li><p><strong>split_parts_ref</strong> – splits up the plot for all pins for the given list of part refs</p></li>
</ul>
</dd>
<dt class="field-even">Returns<span class="colon">:</span></dt>
<dd class="field-even"><p>graphviz.Digraph</p>
</dd>
</dl>
</dd></dl>

<dl class="py method">
<dt class="sig sig-object py" id="skidl.circuit.Circuit.generate_graph">
<span class="sig-name descname"><span class="pre">generate_graph</span></span><span class="sig-paren">(</span><em class="sig-param"><span class="n"><span class="pre">file_</span></span><span class="o"><span class="pre">=</span></span><span class="default_value"><span class="pre">None</span></span></em>, <em class="sig-param"><span class="n"><span class="pre">engine</span></span><span class="o"><span class="pre">=</span></span><span class="default_value"><span class="pre">'neato'</span></span></em>, <em class="sig-param"><span class="n"><span class="pre">rankdir</span></span><span class="o"><span class="pre">=</span></span><span class="default_value"><span class="pre">'LR'</span></span></em>, <em class="sig-param"><span class="n"><span class="pre">part_shape</span></span><span class="o"><span class="pre">=</span></span><span class="default_value"><span class="pre">'rectangle'</span></span></em>, <em class="sig-param"><span class="n"><span class="pre">net_shape</span></span><span class="o"><span class="pre">=</span></span><span class="default_value"><span class="pre">'point'</span></span></em>, <em class="sig-param"><span class="n"><span class="pre">splines</span></span><span class="o"><span class="pre">=</span></span><span class="default_value"><span class="pre">None</span></span></em>, <em class="sig-param"><span class="n"><span class="pre">show_values</span></span><span class="o"><span class="pre">=</span></span><span class="default_value"><span class="pre">True</span></span></em>, <em class="sig-param"><span class="n"><span class="pre">show_anon</span></span><span class="o"><span class="pre">=</span></span><span class="default_value"><span class="pre">False</span></span></em>, <em class="sig-param"><span class="n"><span class="pre">split_nets</span></span><span class="o"><span class="pre">=</span></span><span class="default_value"><span class="pre">['GND']</span></span></em>, <em class="sig-param"><span class="n"><span class="pre">split_parts_ref</span></span><span class="o"><span class="pre">=</span></span><span class="default_value"><span class="pre">[]</span></span></em><span class="sig-paren">)</span><a class="headerlink" href="#skidl.circuit.Circuit.generate_graph" title="Link to this definition">¶</a></dt>
<dd><p>Returns a graphviz graph as graphviz object and can also write it to a file/stream.
When used in ipython the graphviz object will drawn as an SVG in the output.</p>
<p>See <a class="reference external" href="https://graphviz.readthedocs.io/en/stable/">https://graphviz.readthedocs.io/en/stable/</a> and <a class="reference external" href="http://graphviz.org/doc/info/attrs.html">http://graphviz.org/doc/info/attrs.html</a></p>
<dl class="field-list simple">
<dt class="field-odd">Parameters<span class="colon">:</span></dt>
<dd class="field-odd"><ul class="simple">
<li><p><strong>file</strong> – A string containing a file name, or None.</p></li>
<li><p><strong>engine</strong> – See graphviz documentation</p></li>
<li><p><strong>rankdir</strong> – See graphviz documentation</p></li>
<li><p><strong>part_shape</strong> – Shape of the part nodes</p></li>
<li><p><strong>net_shape</strong> – Shape of the net nodes</p></li>
<li><p><strong>splines</strong> – Style for the edges, try ‘ortho’ for a schematic like feel</p></li>
<li><p><strong>show_values</strong> – Show values as external labels on part nodes</p></li>
<li><p><strong>show_anon</strong> – Show anonymous net names</p></li>
<li><p><strong>split_nets</strong> – splits up the plot for the given list of net names</p></li>
<li><p><strong>split_parts_ref</strong> – splits up the plot for all pins for the given list of part refs</p></li>
</ul>
</dd>
<dt class="field-even">Returns<span class="colon">:</span></dt>
<dd class="field-even"><p>graphviz.Digraph</p>
</dd>
</dl>
</dd></dl>

<dl class="py method">
<dt class="sig sig-object py" id="skidl.circuit.Circuit.generate_netlist">
<span class="sig-name descname"><span class="pre">generate_netlist</span></span><span class="sig-paren">(</span><em class="sig-param"><span class="o"><span class="pre">**</span></span><span class="n"><span class="pre">kwargs</span></span></em><span class="sig-paren">)</span><a class="reference internal" href="../_modules/skidl/circuit.html#Circuit.generate_netlist"><span class="viewcode-link"><span class="pre">[source]</span></span></a><a class="headerlink" href="#skidl.circuit.Circuit.generate_netlist" title="Link to this definition">¶</a></dt>
<dd><p>Return a netlist and also write it to a file/stream.</p>
<dl class="field-list simple">
<dt class="field-odd">Parameters<span class="colon">:</span></dt>
<dd class="field-odd"><ul class="simple">
<li><p><strong>file</strong> – Either a file object that can be written to, or a string
containing a file name, or None.</p></li>
<li><p><strong>tool</strong> – The EDA tool the netlist will be generated for.</p></li>
<li><p><strong>do_backup</strong> – If true, create a library with all the parts in the circuit.</p></li>
</ul>
</dd>
<dt class="field-even">Returns<span class="colon">:</span></dt>
<dd class="field-even"><p>A netlist.</p>
</dd>
</dl>
</dd></dl>

<dl class="py method">
<dt class="sig sig-object py" id="skidl.circuit.Circuit.generate_netlistsvg_skin">
<span class="sig-name descname"><span class="pre">generate_netlistsvg_skin</span></span><span class="sig-paren">(</span><em class="sig-param"><span class="n"><span class="pre">net_stubs</span></span></em>, <em class="sig-param"><span class="n"><span class="pre">layout_options</span></span><span class="o"><span class="pre">=</span></span><span class="default_value"><span class="pre">None</span></span></em><span class="sig-paren">)</span><a class="reference internal" href="../_modules/skidl/circuit.html#Circuit.generate_netlistsvg_skin"><span class="viewcode-link"><span class="pre">[source]</span></span></a><a class="headerlink" href="#skidl.circuit.Circuit.generate_netlistsvg_skin" title="Link to this definition">¶</a></dt>
<dd><p>Generate SVG for schematic symbols for netlistsvg skin file.</p>
<dl class="field-list simple">
<dt class="field-odd">Parameters<span class="colon">:</span></dt>
<dd class="field-odd"><ul class="simple">
<li><p><strong>net_stubs</strong> (<a class="reference external" href="https://docs.python.org/3.11/library/stdtypes.html#list" title="(in Python v3.11)"><em>list</em></a>) – List of nets that are stubbed rather than routed.</p></li>
<li><p><strong>layout_options</strong> (<a class="reference external" href="https://docs.python.org/3.11/library/stdtypes.html#str" title="(in Python v3.11)"><em>str</em></a><em>, </em><em>optional</em>) – String of ELK layout options. Defaults to None.
<a class="reference external" href="https://eclipse.dev/elk/reference/options.html">https://eclipse.dev/elk/reference/options.html</a></p></li>
</ul>
</dd>
<dt class="field-even">Returns<span class="colon">:</span></dt>
<dd class="field-even"><p>SVG for skin file.</p>
</dd>
<dt class="field-odd">Return type<span class="colon">:</span></dt>
<dd class="field-odd"><p><a class="reference external" href="https://docs.python.org/3.11/library/stdtypes.html#str" title="(in Python v3.11)">str</a></p>
</dd>
</dl>
</dd></dl>

<dl class="py method">
<dt class="sig sig-object py" id="skidl.circuit.Circuit.generate_pcb">
<span class="sig-name descname"><span class="pre">generate_pcb</span></span><span class="sig-paren">(</span><em class="sig-param"><span class="o"><span class="pre">**</span></span><span class="n"><span class="pre">kwargs</span></span></em><span class="sig-paren">)</span><a class="reference internal" href="../_modules/skidl/circuit.html#Circuit.generate_pcb"><span class="viewcode-link"><span class="pre">[source]</span></span></a><a class="headerlink" href="#skidl.circuit.Circuit.generate_pcb" title="Link to this definition">¶</a></dt>
<dd><p>Create a PCB file from the circuit.</p>
<dl class="field-list simple">
<dt class="field-odd">Parameters<span class="colon">:</span></dt>
<dd class="field-odd"><ul class="simple">
<li><p><strong>file</strong> – Either a file object that can be written to, or a string
containing a file name, or None.</p></li>
<li><p><strong>tool</strong> – The EDA tool the netlist will be generated for.</p></li>
<li><p><strong>do_backup</strong> – If true, create a library with all the parts in the circuit.</p></li>
<li><p><strong>fp_libs</strong> – List of directories containing footprint libraries.</p></li>
</ul>
</dd>
<dt class="field-even">Returns<span class="colon">:</span></dt>
<dd class="field-even"><p>None.</p>
</dd>
</dl>
</dd></dl>

<dl class="py method">
<dt class="sig sig-object py" id="skidl.circuit.Circuit.generate_schematic">
<span class="sig-name descname"><span class="pre">generate_schematic</span></span><span class="sig-paren">(</span><em class="sig-param"><span class="o"><span class="pre">**</span></span><span class="n"><span class="pre">kwargs</span></span></em><span class="sig-paren">)</span><a class="reference internal" href="../_modules/skidl/circuit.html#Circuit.generate_schematic"><span class="viewcode-link"><span class="pre">[source]</span></span></a><a class="headerlink" href="#skidl.circuit.Circuit.generate_schematic" title="Link to this definition">¶</a></dt>
<dd><p>Create a schematic from a Circuit.</p>
</dd></dl>

<dl class="py method">
<dt class="sig sig-object py" id="skidl.circuit.Circuit.generate_svg">
<span class="sig-name descname"><span class="pre">generate_svg</span></span><span class="sig-paren">(</span><em class="sig-param"><span class="n"><span class="pre">file_</span></span><span class="o"><span class="pre">=</span></span><span class="default_value"><span class="pre">None</span></span></em>, <em class="sig-param"><span class="n"><span class="pre">tool</span></span><span class="o"><span class="pre">=</span></span><span class="default_value"><span class="pre">None</span></span></em>, <em class="sig-param"><span class="n"><span class="pre">layout_options</span></span><span class="o"><span class="pre">=</span></span><span class="default_value"><span class="pre">None</span></span></em><span class="sig-paren">)</span><a class="reference internal" href="../_modules/skidl/circuit.html#Circuit.generate_svg"><span class="viewcode-link"><span class="pre">[source]</span></span></a><a class="headerlink" href="#skidl.circuit.Circuit.generate_svg" title="Link to this definition">¶</a></dt>
<dd><p>Create an SVG file displaying the circuit schematic and
return the dictionary that can be displayed by netlistsvg.</p>
<dl class="field-list simple">
<dt class="field-odd">Parameters<span class="colon">:</span></dt>
<dd class="field-odd"><ul class="simple">
<li><p><strong>file</strong> (<em>_type_</em><em>, </em><em>optional</em>) – Filename to store SVG. Defaults to None.</p></li>
<li><p><strong>tool</strong> (<em>_type_</em><em>, </em><em>optional</em>) – Backend tool. Defaults to None.</p></li>
<li><p><strong>layout_options</strong> (<em>_type_</em><em>, </em><em>optional</em>) – Options to control netlistsvg/ELK layout algorithm. Defaults to None.</p></li>
</ul>
</dd>
<dt class="field-even">Returns<span class="colon">:</span></dt>
<dd class="field-even"><p>JSON dictionary for input to netlistsvg.</p>
</dd>
<dt class="field-odd">Return type<span class="colon">:</span></dt>
<dd class="field-odd"><p><a class="reference external" href="https://docs.python.org/3.11/library/stdtypes.html#dict" title="(in Python v3.11)">dict</a></p>
</dd>
</dl>
</dd></dl>

<dl class="py method">
<dt class="sig sig-object py" id="skidl.circuit.Circuit.generate_xml">
<span class="sig-name descname"><span class="pre">generate_xml</span></span><span class="sig-paren">(</span><em class="sig-param"><span class="n"><span class="pre">file_</span></span><span class="o"><span class="pre">=</span></span><span class="default_value"><span class="pre">None</span></span></em>, <em class="sig-param"><span class="n"><span class="pre">tool</span></span><span class="o"><span class="pre">=</span></span><span class="default_value"><span class="pre">None</span></span></em><span class="sig-paren">)</span><a class="reference internal" href="../_modules/skidl/circuit.html#Circuit.generate_xml"><span class="viewcode-link"><span class="pre">[source]</span></span></a><a class="headerlink" href="#skidl.circuit.Circuit.generate_xml" title="Link to this definition">¶</a></dt>
<dd><p>Return netlist as an XML string and also write it to a file/stream.</p>
<dl class="field-list simple">
<dt class="field-odd">Parameters<span class="colon">:</span></dt>
<dd class="field-odd"><ul class="simple">
<li><p><strong>file</strong> – Either a file object that can be written to, or a string
containing a file name, or None.</p></li>
<li><p><strong>tool</strong> – Backend tool such as KICAD.</p></li>
</ul>
</dd>
<dt class="field-even">Returns<span class="colon">:</span></dt>
<dd class="field-even"><p>A string containing the netlist.</p>
</dd>
</dl>
</dd></dl>

<dl class="py method">
<dt class="sig sig-object py" id="skidl.circuit.Circuit.get_net_nc_stubs">
<span class="sig-name descname"><span class="pre">get_net_nc_stubs</span></span><span class="sig-paren">(</span><span class="sig-paren">)</span><a class="reference internal" href="../_modules/skidl/circuit.html#Circuit.get_net_nc_stubs"><span class="viewcode-link"><span class="pre">[source]</span></span></a><a class="headerlink" href="#skidl.circuit.Circuit.get_net_nc_stubs" title="Link to this definition">¶</a></dt>
<dd><p>Get all nets/buses that are stubs or no-connects.</p>
</dd></dl>

<dl class="py method">
<dt class="sig sig-object py" id="skidl.circuit.Circuit.get_nets">
<span class="sig-name descname"><span class="pre">get_nets</span></span><span class="sig-paren">(</span><span class="sig-paren">)</span><a class="reference internal" href="../_modules/skidl/circuit.html#Circuit.get_nets"><span class="viewcode-link"><span class="pre">[source]</span></span></a><a class="headerlink" href="#skidl.circuit.Circuit.get_nets" title="Link to this definition">¶</a></dt>
<dd><p>Get all the distinct nets for the circuit.</p>
</dd></dl>

<dl class="py method">
<dt class="sig sig-object py" id="skidl.circuit.Circuit.instantiate_packages">
<span class="sig-name descname"><span class="pre">instantiate_packages</span></span><span class="sig-paren">(</span><span class="sig-paren">)</span><a class="reference internal" href="../_modules/skidl/circuit.html#Circuit.instantiate_packages"><span class="viewcode-link"><span class="pre">[source]</span></span></a><a class="headerlink" href="#skidl.circuit.Circuit.instantiate_packages" title="Link to this definition">¶</a></dt>
<dd><p>Run the package executables to instantiate their circuitry.</p>
</dd></dl>

<dl class="py method">
<dt class="sig sig-object py" id="skidl.circuit.Circuit.merge_net_names">
<span class="sig-name descname"><span class="pre">merge_net_names</span></span><span class="sig-paren">(</span><span class="sig-paren">)</span><a class="reference internal" href="../_modules/skidl/circuit.html#Circuit.merge_net_names"><span class="viewcode-link"><span class="pre">[source]</span></span></a><a class="headerlink" href="#skidl.circuit.Circuit.merge_net_names" title="Link to this definition">¶</a></dt>
<dd><p>Assign same name to all segments of multi-segment nets.</p>
</dd></dl>

<dl class="py method">
<dt class="sig sig-object py" id="skidl.circuit.Circuit.merge_nets">
<span class="sig-name descname"><span class="pre">merge_nets</span></span><span class="sig-paren">(</span><span class="sig-paren">)</span><a class="reference internal" href="../_modules/skidl/circuit.html#Circuit.merge_nets"><span class="viewcode-link"><span class="pre">[source]</span></span></a><a class="headerlink" href="#skidl.circuit.Circuit.merge_nets" title="Link to this definition">¶</a></dt>
<dd><p>Merge multi-segment nets into a single net.</p>
</dd></dl>

<dl class="py method">
<dt class="sig sig-object py" id="skidl.circuit.Circuit.mini_reset">
<span class="sig-name descname"><span class="pre">mini_reset</span></span><span class="sig-paren">(</span><em class="sig-param"><span class="n"><span class="pre">init</span></span><span class="o"><span class="pre">=</span></span><span class="default_value"><span class="pre">False</span></span></em><span class="sig-paren">)</span><a class="reference internal" href="../_modules/skidl/circuit.html#Circuit.mini_reset"><span class="viewcode-link"><span class="pre">[source]</span></span></a><a class="headerlink" href="#skidl.circuit.Circuit.mini_reset" title="Link to this definition">¶</a></dt>
<dd><p>Clear any circuitry but don’t erase any loaded part libraries.</p>
</dd></dl>

<dl class="py property">
<dt class="sig sig-object py" id="skidl.circuit.Circuit.no_files">
<em class="property"><span class="pre">property</span><span class="w"> </span></em><span class="sig-name descname"><span class="pre">no_files</span></span><a class="headerlink" href="#skidl.circuit.Circuit.no_files" title="Link to this definition">¶</a></dt>
<dd><p>Prevent creation of output files (netlists, ERC, logs) by this Circuit object.</p>
</dd></dl>

<dl class="py method">
<dt class="sig sig-object py" id="skidl.circuit.Circuit.reset">
<span class="sig-name descname"><span class="pre">reset</span></span><span class="sig-paren">(</span><em class="sig-param"><span class="n"><span class="pre">init</span></span><span class="o"><span class="pre">=</span></span><span class="default_value"><span class="pre">False</span></span></em><span class="sig-paren">)</span><a class="reference internal" href="../_modules/skidl/circuit.html#Circuit.reset"><span class="viewcode-link"><span class="pre">[source]</span></span></a><a class="headerlink" href="#skidl.circuit.Circuit.reset" title="Link to this definition">¶</a></dt>
<dd><p>Clear any circuitry and cached part libraries and start over.</p>
</dd></dl>

<dl class="py method">
<dt class="sig sig-object py" id="skidl.circuit.Circuit.rmv_buses">
<span class="sig-name descname"><span class="pre">rmv_buses</span></span><span class="sig-paren">(</span><em class="sig-param"><span class="o"><span class="pre">*</span></span><span class="n"><span class="pre">buses</span></span></em><span class="sig-paren">)</span><a class="reference internal" href="../_modules/skidl/circuit.html#Circuit.rmv_buses"><span class="viewcode-link"><span class="pre">[source]</span></span></a><a class="headerlink" href="#skidl.circuit.Circuit.rmv_buses" title="Link to this definition">¶</a></dt>
<dd><p>Remove some buses from the circuit.</p>
</dd></dl>

<dl class="py method">
<dt class="sig sig-object py" id="skidl.circuit.Circuit.rmv_hierarchical_name">
<span class="sig-name descname"><span class="pre">rmv_hierarchical_name</span></span><span class="sig-paren">(</span><em class="sig-param"><span class="n"><span class="pre">name</span></span></em><span class="sig-paren">)</span><a class="reference internal" href="../_modules/skidl/circuit.html#Circuit.rmv_hierarchical_name"><span class="viewcode-link"><span class="pre">[source]</span></span></a><a class="headerlink" href="#skidl.circuit.Circuit.rmv_hierarchical_name" title="Link to this definition">¶</a></dt>
<dd><p>Remove an existing hierarchical name.  Throw an error if non-existent.</p>
</dd></dl>

<dl class="py method">
<dt class="sig sig-object py" id="skidl.circuit.Circuit.rmv_nets">
<span class="sig-name descname"><span class="pre">rmv_nets</span></span><span class="sig-paren">(</span><em class="sig-param"><span class="o"><span class="pre">*</span></span><span class="n"><span class="pre">nets</span></span></em><span class="sig-paren">)</span><a class="reference internal" href="../_modules/skidl/circuit.html#Circuit.rmv_nets"><span class="viewcode-link"><span class="pre">[source]</span></span></a><a class="headerlink" href="#skidl.circuit.Circuit.rmv_nets" title="Link to this definition">¶</a></dt>
<dd><p>Remove some Net objects from the circuit.</p>
</dd></dl>

<dl class="py method">
<dt class="sig sig-object py" id="skidl.circuit.Circuit.rmv_packages">
<span class="sig-name descname"><span class="pre">rmv_packages</span></span><span class="sig-paren">(</span><em class="sig-param"><span class="o"><span class="pre">*</span></span><span class="n"><span class="pre">packages</span></span></em><span class="sig-paren">)</span><a class="reference internal" href="../_modules/skidl/circuit.html#Circuit.rmv_packages"><span class="viewcode-link"><span class="pre">[source]</span></span></a><a class="headerlink" href="#skidl.circuit.Circuit.rmv_packages" title="Link to this definition">¶</a></dt>
<dd></dd></dl>

<dl class="py method">
<dt class="sig sig-object py" id="skidl.circuit.Circuit.rmv_parts">
<span class="sig-name descname"><span class="pre">rmv_parts</span></span><span class="sig-paren">(</span><em class="sig-param"><span class="o"><span class="pre">*</span></span><span class="n"><span class="pre">parts</span></span></em><span class="sig-paren">)</span><a class="reference internal" href="../_modules/skidl/circuit.html#Circuit.rmv_parts"><span class="viewcode-link"><span class="pre">[source]</span></span></a><a class="headerlink" href="#skidl.circuit.Circuit.rmv_parts" title="Link to this definition">¶</a></dt>
<dd><p>Remove some Part objects from the circuit.</p>
</dd></dl>

<dl class="py method">
<dt class="sig sig-object py" id="skidl.circuit.Circuit.rmv_stuff">
<span class="sig-name descname"><span class="pre">rmv_stuff</span></span><span class="sig-paren">(</span><em class="sig-param"><span class="o"><span class="pre">*</span></span><span class="n"><span class="pre">stuff</span></span></em><span class="sig-paren">)</span><a class="reference internal" href="../_modules/skidl/circuit.html#Circuit.rmv_stuff"><span class="viewcode-link"><span class="pre">[source]</span></span></a><a class="headerlink" href="#skidl.circuit.Circuit.rmv_stuff" title="Link to this definition">¶</a></dt>
<dd><p>Remove Parts, Nets, Buses, and Interfaces from the circuit.</p>
</dd></dl>

</dd></dl>

</section>


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  <div>
    <h3><a href="../index.html">Table of Contents</a></h3>
    <ul>
<li><a class="reference internal" href="#">skidl.circuit module</a><ul>
<li><a class="reference internal" href="#skidl.circuit.Circuit"><code class="docutils literal notranslate"><span class="pre">Circuit</span></code></a><ul>
<li><a class="reference internal" href="#skidl.circuit.Circuit.parts"><code class="docutils literal notranslate"><span class="pre">Circuit.parts</span></code></a></li>
<li><a class="reference internal" href="#skidl.circuit.Circuit.nets"><code class="docutils literal notranslate"><span class="pre">Circuit.nets</span></code></a></li>
<li><a class="reference internal" href="#skidl.circuit.Circuit.buses"><code class="docutils literal notranslate"><span class="pre">Circuit.buses</span></code></a></li>
<li><a class="reference internal" href="#skidl.circuit.Circuit.hierarchy"><code class="docutils literal notranslate"><span class="pre">Circuit.hierarchy</span></code></a></li>
<li><a class="reference internal" href="#skidl.circuit.Circuit.level"><code class="docutils literal notranslate"><span class="pre">Circuit.level</span></code></a></li>
<li><a class="reference internal" href="#skidl.circuit.Circuit.context"><code class="docutils literal notranslate"><span class="pre">Circuit.context</span></code></a></li>
<li><a class="reference internal" href="#skidl.circuit.Circuit.ERC"><code class="docutils literal notranslate"><span class="pre">Circuit.ERC()</span></code></a></li>
<li><a class="reference internal" href="#skidl.circuit.Circuit.activate"><code class="docutils literal notranslate"><span class="pre">Circuit.activate()</span></code></a></li>
<li><a class="reference internal" href="#skidl.circuit.Circuit.add_buses"><code class="docutils literal notranslate"><span class="pre">Circuit.add_buses()</span></code></a></li>
<li><a class="reference internal" href="#skidl.circuit.Circuit.add_hierarchical_name"><code class="docutils literal notranslate"><span class="pre">Circuit.add_hierarchical_name()</span></code></a></li>
<li><a class="reference internal" href="#skidl.circuit.Circuit.add_nets"><code class="docutils literal notranslate"><span class="pre">Circuit.add_nets()</span></code></a></li>
<li><a class="reference internal" href="#skidl.circuit.Circuit.add_packages"><code class="docutils literal notranslate"><span class="pre">Circuit.add_packages()</span></code></a></li>
<li><a class="reference internal" href="#skidl.circuit.Circuit.add_parts"><code class="docutils literal notranslate"><span class="pre">Circuit.add_parts()</span></code></a></li>
<li><a class="reference internal" href="#skidl.circuit.Circuit.add_stuff"><code class="docutils literal notranslate"><span class="pre">Circuit.add_stuff()</span></code></a></li>
<li><a class="reference internal" href="#skidl.circuit.Circuit.backup_parts"><code class="docutils literal notranslate"><span class="pre">Circuit.backup_parts()</span></code></a></li>
<li><a class="reference internal" href="#skidl.circuit.Circuit.deactivate"><code class="docutils literal notranslate"><span class="pre">Circuit.deactivate()</span></code></a></li>
<li><a class="reference internal" href="#skidl.circuit.Circuit.erc_list"><code class="docutils literal notranslate"><span class="pre">Circuit.erc_list</span></code></a></li>
<li><a class="reference internal" href="#skidl.circuit.Circuit.generate_dot"><code class="docutils literal notranslate"><span class="pre">Circuit.generate_dot()</span></code></a></li>
<li><a class="reference internal" href="#skidl.circuit.Circuit.generate_graph"><code class="docutils literal notranslate"><span class="pre">Circuit.generate_graph()</span></code></a></li>
<li><a class="reference internal" href="#skidl.circuit.Circuit.generate_netlist"><code class="docutils literal notranslate"><span class="pre">Circuit.generate_netlist()</span></code></a></li>
<li><a class="reference internal" href="#skidl.circuit.Circuit.generate_netlistsvg_skin"><code class="docutils literal notranslate"><span class="pre">Circuit.generate_netlistsvg_skin()</span></code></a></li>
<li><a class="reference internal" href="#skidl.circuit.Circuit.generate_pcb"><code class="docutils literal notranslate"><span class="pre">Circuit.generate_pcb()</span></code></a></li>
<li><a class="reference internal" href="#skidl.circuit.Circuit.generate_schematic"><code class="docutils literal notranslate"><span class="pre">Circuit.generate_schematic()</span></code></a></li>
<li><a class="reference internal" href="#skidl.circuit.Circuit.generate_svg"><code class="docutils literal notranslate"><span class="pre">Circuit.generate_svg()</span></code></a></li>
<li><a class="reference internal" href="#skidl.circuit.Circuit.generate_xml"><code class="docutils literal notranslate"><span class="pre">Circuit.generate_xml()</span></code></a></li>
<li><a class="reference internal" href="#skidl.circuit.Circuit.get_net_nc_stubs"><code class="docutils literal notranslate"><span class="pre">Circuit.get_net_nc_stubs()</span></code></a></li>
<li><a class="reference internal" href="#skidl.circuit.Circuit.get_nets"><code class="docutils literal notranslate"><span class="pre">Circuit.get_nets()</span></code></a></li>
<li><a class="reference internal" href="#skidl.circuit.Circuit.instantiate_packages"><code class="docutils literal notranslate"><span class="pre">Circuit.instantiate_packages()</span></code></a></li>
<li><a class="reference internal" href="#skidl.circuit.Circuit.merge_net_names"><code class="docutils literal notranslate"><span class="pre">Circuit.merge_net_names()</span></code></a></li>
<li><a class="reference internal" href="#skidl.circuit.Circuit.merge_nets"><code class="docutils literal notranslate"><span class="pre">Circuit.merge_nets()</span></code></a></li>
<li><a class="reference internal" href="#skidl.circuit.Circuit.mini_reset"><code class="docutils literal notranslate"><span class="pre">Circuit.mini_reset()</span></code></a></li>
<li><a class="reference internal" href="#skidl.circuit.Circuit.no_files"><code class="docutils literal notranslate"><span class="pre">Circuit.no_files</span></code></a></li>
<li><a class="reference internal" href="#skidl.circuit.Circuit.reset"><code class="docutils literal notranslate"><span class="pre">Circuit.reset()</span></code></a></li>
<li><a class="reference internal" href="#skidl.circuit.Circuit.rmv_buses"><code class="docutils literal notranslate"><span class="pre">Circuit.rmv_buses()</span></code></a></li>
<li><a class="reference internal" href="#skidl.circuit.Circuit.rmv_hierarchical_name"><code class="docutils literal notranslate"><span class="pre">Circuit.rmv_hierarchical_name()</span></code></a></li>
<li><a class="reference internal" href="#skidl.circuit.Circuit.rmv_nets"><code class="docutils literal notranslate"><span class="pre">Circuit.rmv_nets()</span></code></a></li>
<li><a class="reference internal" href="#skidl.circuit.Circuit.rmv_packages"><code class="docutils literal notranslate"><span class="pre">Circuit.rmv_packages()</span></code></a></li>
<li><a class="reference internal" href="#skidl.circuit.Circuit.rmv_parts"><code class="docutils literal notranslate"><span class="pre">Circuit.rmv_parts()</span></code></a></li>
<li><a class="reference internal" href="#skidl.circuit.Circuit.rmv_stuff"><code class="docutils literal notranslate"><span class="pre">Circuit.rmv_stuff()</span></code></a></li>
</ul>
</li>
</ul>
</li>
</ul>

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